Ok Thank you very much for your reply 6by9:
Im running Raspberry pi OS:
Linux raspberrypi 6.6.51+rpt-rpi-v8 #1 SMP PREEMPT Debian 1:6.6.51-1+rpt3 (2024-10-08) aarch64 GNU/Linux
I've switched to a different panel now using an ST7703 IC. I've updated the driver for the initialisation sequence. I've found that running 'depmod -a' after insmod and moving my new .ko to the driver location in /lib.
The error appears to be the same here also:
6by9, you mentioned there could be a 'big problem' are you thinking hardware? Should I be trying a different CM4 and IO board?
I'm currently breaking out my fpc's both board and panel end to DIP pin and jumper cabling them.
The 3.3v for the panel VCI im pulling straight form the dsi output on the CM4IO board,
The, 1.8v I need for the Panel IOVCC, I'm dividing form the 3.3V off the GPIO headers on the IO board.
The reset pin I've tied from the GPIO header (GPIO17, pin 11 on the CM4IO board)
I'm going a bit mad with these modules, but think I'm getting somewhere.
my dts im using is as follows, could I be using this wrong?
To add into the mix I have been sent the following clock parameters by the manufacturer:
params->dsi.PLL_CLOCK=(216)//MTK
params->MIPI_CLOCK=(432)Mbps
params->RGB_CLOCK=(35)M
Is there somewhere I can set the dsi PLL_CLOCK/MIPI_CLOCK?
I guess the RGB clock will be my dot clock in the default panel timings.
Thank you very much for the help so far,
Would be great if I could get this panel working (once found the error, will probably fix my issue with the other one also)!
Im running Raspberry pi OS:
Linux raspberrypi 6.6.51+rpt-rpi-v8 #1 SMP PREEMPT Debian 1:6.6.51-1+rpt3 (2024-10-08) aarch64 GNU/Linux
I've switched to a different panel now using an ST7703 IC. I've updated the driver for the initialisation sequence. I've found that running 'depmod -a' after insmod and moving my new .ko to the driver location in /lib.
The error appears to be the same here also:
Code:
vanity@raspberrypi:~ $ dmesg | grep dsi [ 0.046636] platform fe101000.cprman: Fixed dependency cycle(s) with /soc/dsi@7e700000[ 0.048737] platform fe101000.cprman: Fixed dependency cycle(s) with /soc/dsi@7e700000[ 0.048828] platform fe700000.dsi: Fixed dependency cycle(s) with /soc/dsi@7e700000/fs040wx017@0[ 0.048870] platform fe700000.dsi: Fixed dependency cycle(s) with /soc/cprman@7e101000[ 6.528545] vc4_dsi fe700000.dsi: Fixed dependency cycle(s) with /soc/dsi@7e700000/fs040wx017@0[ 6.529034] mipi-dsi fe700000.dsi.0: Fixed dependency cycle(s) with /soc/dsi@7e700000[ 7.137860] panel-sitronix-st7703 fe700000.dsi.0: supply vcc not found, using dummy regulator[ 7.137982] panel-sitronix-st7703 fe700000.dsi.0: supply iovcc not found, using dummy regulator[ 7.145480] vc4-drm gpu: bound fe700000.dsi (ops vc4_dsi_ops [vc4])[ 7.712302] [drm:vc4_dsi_host_transfer [vc4]] *ERROR* DSI transfer failed whilst in HS mode stat: 0x00020803[ 7.712423] panel-sitronix-st7703 fe700000.dsi.0: transmit data failed: -110[ 7.712436] panel-sitronix-st7703 fe700000.dsi.0: Panel init sequence failed: -110[ 7.752637] panel-sitronix-st7703 fe700000.dsi.0: 720x720@60 24bpp dsi 2dl - ready6by9, you mentioned there could be a 'big problem' are you thinking hardware? Should I be trying a different CM4 and IO board?
I'm currently breaking out my fpc's both board and panel end to DIP pin and jumper cabling them.
The 3.3v for the panel VCI im pulling straight form the dsi output on the CM4IO board,
The, 1.8v I need for the Panel IOVCC, I'm dividing form the 3.3V off the GPIO headers on the IO board.
The reset pin I've tied from the GPIO header (GPIO17, pin 11 on the CM4IO board)
I'm going a bit mad with these modules, but think I'm getting somewhere.
my dts im using is as follows, could I be using this wrong?
Code:
/dts-v1/;/plugin/;#include <dt-bindings/gpio/gpio.h>/ {compatible = "brcm,bcm2835";dsi_frag:fragment@0 {target = <&dsi1>;__overlay__ {status = "okay"; #address-cells = <1>;#size-cells = <0>; port {dsi_out:endpoint {remote-endpoint = <&panel_in>;};}; fs040wx017:fs040wx017@0 {compatible = "fascontek,fs04hd032","sitronix,st7703";reg = <0>;status = "okay";reset-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;port {panel_in:endpoint {remote-endpoint = <&dsi_out>;};};};};};__overrides__ {dsi0 = <&dsi_frag>, "target:0=",<&dsi0>;};};To add into the mix I have been sent the following clock parameters by the manufacturer:
params->dsi.PLL_CLOCK=(216)//MTK
params->MIPI_CLOCK=(432)Mbps
params->RGB_CLOCK=(35)M
Is there somewhere I can set the dsi PLL_CLOCK/MIPI_CLOCK?
I guess the RGB clock will be my dot clock in the default panel timings.
Thank you very much for the help so far,
Would be great if I could get this panel working (once found the error, will probably fix my issue with the other one also)!
Statistics: Posted by DHWill — Thu Jan 30, 2025 5:48 pm