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General • Re: Baremetal interrupt and GCC

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I will check the alignment maybe that is significant
I started getting very specific using the naked mode for the return I was making sure it was using the right stack
and going back to right mode and stack

Code:

            /* Do EXC_RETURN to thread mode using MSP (hardware will pop R0-R3,R12,LR,PC,xPSR) */  "LDR   R0, =0xFFFFFFF9      \n"  "MOV   LR, R0               \n"  "BX    LR                   \n"  );
I was down to just two tasks swapping doing atomic XOR on an IO port to flash a LED and then
decrement register delay loop. And task1 used R9 and task 2 used R10.

Everything works great and runs for hours until I turn on the high priority task..

The high priority interrupt doesn't touch a variable or anything or to do with the task system and it runs for hours by itself.
I hadn't got it to the point the two systems connect because I need to get syncro primitives for that

They run perfectly together at the same priority it's only when I boost the priority of the high priority interrupt
that it seems to lock up or crash within a minute or so. So it's something to do with nested interrupts.
It can only push down two levels and I gave it massive stacks. While its running the stack use is like 1%.
Changing the stack size made no difference to run time.

So for now I have left it as a to be done exercise and I will have to do some reading on CortexM0 NVIC and nested interrupts.

Statistics: Posted by LdB — Thu Nov 06, 2025 12:16 am



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