I'm reverse engineering a device (a 2019 NES clone) which is based around an SPI flash chip. I want to capture the traffic to and from the flash chip so I can see what the device is doing. I've done this before with other devices with great success.
Thing is, this one is running at 90 fricking megaherz, which is about 66 MHz more than my logic analyzer can do...
I know there are various relatively turnkey signal analyser firmware packages for the Pico which run fast enough, such as µLA: viewtopic.php?t=350300 But that's only captures to memory, and a 200kB buffer doesn't last very long, and I'd have to overclock the board to get a high enough sample rate. (At least 180 Msps. Preferably more.)
For the specific case of capturing QSPI, it occurs to me that there should be an easier way --- as the signal is intrinsically clocked, I know when to sample the bus. Also, each sample is literally four bits, so the buffer should go a lot further.
Before I try writing something myself, does anyone know if something similar already exists?
Thanks!
Thing is, this one is running at 90 fricking megaherz, which is about 66 MHz more than my logic analyzer can do...
I know there are various relatively turnkey signal analyser firmware packages for the Pico which run fast enough, such as µLA: viewtopic.php?t=350300 But that's only captures to memory, and a 200kB buffer doesn't last very long, and I'd have to overclock the board to get a high enough sample rate. (At least 180 Msps. Preferably more.)
For the specific case of capturing QSPI, it occurs to me that there should be an easier way --- as the signal is intrinsically clocked, I know when to sample the bus. Also, each sample is literally four bits, so the buffer should go a lot further.
Before I try writing something myself, does anyone know if something similar already exists?
Thanks!
Statistics: Posted by david.given — Fri Nov 07, 2025 11:19 pm