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Bare metal, Assembly language • Re: how does primary core start secondary core on pi5 baremetal

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Circle (a bare-metal project targetting Raspberry Pi) has support for multi-core on Pi5; that might be a decent starting point:
https://github.com/rsta2/circle/blob/7f ... p64.S#L101
Hi roliver, thanks for linking me to circle, it's very professional.
I have also found some ways in TF-A by writing the mailbox and send event waking up the secondary cores. Or by writing own armstub with the magic values.

Code:

#define PLAT_RPI3_TM_ENTRYPOINT     0x100#define PLAT_RPI3_TM_ENTRYPOINT_SIZE    8ULL/* Hold entries for each CPU. */#define PLAT_RPI3_TM_HOLD_BASE      (PLAT_RPI3_TM_ENTRYPOINT + PLAT_RPI3_TM_ENTRYPOINT_SIZE)#define PLAT_RPI3_TM_HOLD_ENTRY_SIZE    8ULL#define PLAT_RPI3_TM_HOLD_SIZE      (PLAT_RPI3_TM_HOLD_ENTRY_SIZE * PLATFORM_CORE_COUNT)#define PLAT_RPI3_TRUSTED_MAILBOX_SIZE  (PLAT_RPI3_TM_ENTRYPOINT_SIZE + PLAT_RPI3_TM_HOLD_SIZE)#define PLAT_RPI3_TM_HOLD_STATE_WAIT    0ULL#define PLAT_RPI3_TM_HOLD_STATE_GO  1ULL#define PLAT_RPI3_TM_HOLD_STATE_BSP_OFF 2ULL

Code:

    mov x0, PLAT_RPI3_TM_HOLD_BASE    add x0, x0, #8    mov x1, PLAT_RPI3_TM_HOLD_STATE_GO    str x1, [x0]    isb    mov x0, PLAT_RPI3_TM_ENTRYPOINT    ldr x1, =_start    str x1, [x0]    isb    sev

Statistics: Posted by keep-beyond — Thu Nov 27, 2025 1:58 am



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